Function: vhdl-template-for

vhdl-template-for is an interactive and byte-compiled function defined in vhdl-mode.el.gz.

Signature

(vhdl-template-for)

Documentation

Insert a block or component configuration if within a configuration declaration, a configuration specification if within an architecture declarative part (and not within a subprogram), a for-loop if within a sequential statement part (subprogram or process), and a for-generate otherwise.

Key Bindings

Source Code

;; Defined in /usr/src/emacs/lisp/progmodes/vhdl-mode.el.gz
(defun vhdl-template-for ()
  "Insert a block or component configuration if within a configuration
declaration, a configuration specification if within an architecture
declarative part (and not within a subprogram), a for-loop if within a
sequential statement part (subprogram or process), and a for-generate
otherwise."
  (interactive)
  (vhdl-prepare-search-1
   (cond
    ((vhdl-sequential-statement-p)	; sequential statement
     (vhdl-template-for-loop))
    ((and (save-excursion		; configuration declaration
	    (re-search-backward "^\\(configuration\\|end\\)\\>" nil t))
	  (equal "CONFIGURATION" (upcase (match-string 1))))
     (if (eq (vhdl-decision-query
	      "for" "(b)lock or (c)omponent configuration?" t)
	     ?c)
	 (vhdl-template-component-conf)
       (vhdl-template-block-configuration)))
    ((and (save-excursion
	    (re-search-backward		; architecture declarative part
	     "^\\(architecture\\|entity\\|begin\\|end\\)\\>" nil t))
	  (equal "ARCHITECTURE" (upcase (match-string 1))))
     (vhdl-template-configuration-spec))
    (t (vhdl-template-for-generate))))) ; concurrent statement