Variable: verilog-gate-ios

verilog-gate-ios is a variable defined in verilog-mode.el.gz.

Value

(("and" "output")
 ("buf" "output")
 ("bufif0" "output")
 ("bufif1" "output")
 ("cmos" "output")
 ("nand" "output")
 ("nmos" "output")
 ("nor" "output")
 ("not" "output")
 ("notif0" "output")
 ("notif1" "output")
 ("or" "output")
 ("pmos" "output")
 ("pulldown" "output")
 ("pullup" "output")
 ("rcmos" "output")
 ("rnmos" "output")
 ("rpmos" "output")
 ("rtran" "inout" "inout")
 ("rtranif0" "inout" "inout")
 ("rtranif1" "inout" "inout")
 ("tran" "inout" "inout")
 ("tranif0" "inout" "inout")
 ("tranif1" "inout" "inout")
 ("xnor" "output")
 ("xor" "output"))

Documentation

Map of direction for each positional argument to each gate primitive.

Source Code

;; Defined in /usr/src/emacs/lisp/progmodes/verilog-mode.el.gz
(defvar verilog-gate-ios
  ;; All these have an implied {"input"...} at the end
  '(("and"	"output")
    ("buf"	"output")
    ("bufif0"	"output")
    ("bufif1"	"output")
    ("cmos"	"output")
    ("nand"	"output")
    ("nmos"	"output")
    ("nor"	"output")
    ("not"	"output")
    ("notif0"	"output")
    ("notif1"	"output")
    ("or"	"output")
    ("pmos"	"output")
    ("pulldown"	"output")
    ("pullup"	"output")
    ("rcmos"	"output")
    ("rnmos"	"output")
    ("rpmos"	"output")
    ("rtran"	"inout" "inout")
    ("rtranif0"	"inout" "inout")
    ("rtranif1"	"inout" "inout")
    ("tran"	"inout" "inout")
    ("tranif0"	"inout" "inout")
    ("tranif1"	"inout" "inout")
    ("xnor"	"output")
    ("xor"	"output"))
  "Map of direction for each positional argument to each gate primitive.")