Variable: vera-keywords

vera-keywords is a variable defined in vera-mode.el.gz.

Value

("after" "all" "any" "around" "assoc_index" "assoc_size" "async"
 "bad_state" "bad_trans" "before" "begin" "big_endian" "bind"
 "bin_activation" "bit_normal" "bit_reverse" "break" "breakpoint"
 "case" "casex" "casez" "class" "constraint" "continue" "coverage"
 "coverage_block" "coverage_def" "coverage_depth" "coverage_goal"
 "coverage_group" "coverage_option" "coverage_val"
 "cross_num_print_missing" "cross_auto_bin_max" "cov_comment"
 "default" "depth" "dist" "do" "else" "end" "enum" "exhaustive"
 "export" "extends" "extern" "for" "foreach" "fork" "function"
 "hdl_task" "hdl_node" "hide" "if" "illegal_self_transition"
 "illegal_state" "illegal_transition" "in" "interface" "invisible"
 "join" "little_endian" "local" "m_bad_state" "m_bad_trans" "m_state"
 "m_trans" "negedge" "new" "newcov" "non_rand" "none" "not" "null"
 "or" "ordered" "packed" "port" "posedge" "proceed" "prod" "prodget"
 "prodset" "program" "protected" "public" "rand" "randc" "randcase"
 "randseq" "repeat" "return" "rules" "sample" "sample_event" "shadow"
 "soft" "state" "static" "super" "task" "terminate" "this" "trans"
 "typedef" "unpacked" "var" "vca" "vector" "verilog_node"
 "verilog_task" "vhdl_node" "vhdl_task" "virtual" "virtuals" "visible"
 "void" "while" "wildcard" "with")

Documentation

List of Vera keywords.

Source Code

;; Defined in /usr/src/emacs/lisp/progmodes/vera-mode.el.gz
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;; Vera definitions
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;

;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;; Keywords

(defconst vera-keywords
  '(
    "after" "all" "any" "around" "assoc_index" "assoc_size" "async"
    "bad_state" "bad_trans" "before" "begin" "big_endian" "bind"
    "bin_activation" "bit_normal" "bit_reverse" "break" "breakpoint"
    "case" "casex" "casez" "class" "constraint" "continue"
    "coverage" "coverage_block" "coverage_def" "coverage_depth"
    "coverage_goal" "coverage_group" "coverage_option" "coverage_val"
    "cross_num_print_missing" "cross_auto_bin_max" "cov_comment"
    "default" "depth" "dist" "do"
    "else" "end" "enum" "exhaustive" "export" "extends" "extern"
    "for" "foreach" "fork" "function"
    "hdl_task" "hdl_node" "hide"
    "if" "illegal_self_transition" "illegal_state" "illegal_transition"
    "in" "interface" "invisible"
    "join"
    "little_endian" "local"
    "m_bad_state" "m_bad_trans" "m_state" "m_trans"
    "negedge" "new" "newcov" "non_rand" "none" "not" "null"
    "or" "ordered"
    "packed" "port" "posedge" "proceed" "prod" "prodget" "prodset"
    "program" "protected" "public"
    "rand" "randc" "randcase" "randseq" "repeat" "return" "rules"
    "sample" "sample_event" "shadow" "soft" "state" "static" "super"
    "task" "terminate" "this" "trans" "typedef"
    "unpacked"
    "var" "vca" "vector" "verilog_node" "verilog_task"
    "vhdl_node" "vhdl_task" "virtual" "virtuals" "visible" "void"
    "while" "wildcard" "with"
    )
  "List of Vera keywords.")