Function: verilog-read-decls
verilog-read-decls is a byte-compiled function defined in
verilog-mode.el.gz.
Signature
(verilog-read-decls)
Documentation
Compute signal declaration information for the current module at point.
Return an array of [outputs inouts inputs wire reg assign const gparam intf].
Source Code
;; Defined in /usr/src/emacs/lisp/progmodes/verilog-mode.el.gz
(defun verilog-read-decls ()
"Compute signal declaration information for the current module at point.
Return an array of [outputs inouts inputs wire reg assign const gparam intf]."
(verilog--suppressed-warnings
((lexical sigs-intf sigs-var sigs-const sigs-assign sigs-var
sigs-gparam sigs-inout sigs-out sigs-in))
;; The local variable below are accessed via (symbol-value expect-signal).
(defvar sigs-intf) (defvar sigs-var) (defvar sigs-const)
(defvar sigs-assign) (defvar sigs-var) (defvar sigs-gparam)
(defvar sigs-inout) (defvar sigs-out) (defvar sigs-in))
(let ((end-mod-point (or (verilog-get-end-of-defun) (point-max)))
(functask 0) (paren 0) (sig-paren 0) (v2kargs-ok t)
in-modport in-clocking in-ign-to-semi ptype ign-prop
sigs-in sigs-out sigs-inout sigs-var sigs-assign sigs-const
sigs-gparam sigs-intf sigs-modports
vec expect-signal keywd last-keywd newsig rvalue enum io
signed typedefed multidim
modport
varstack tmp)
;;(if dbg (setq dbg (concat dbg (format "\n\nverilog-read-decls START PT %s END %s\n" (point) end-mod-point))))
(save-excursion
(verilog-beg-of-defun-quick)
(setq sigs-const (verilog-read-auto-constants (point) end-mod-point))
(while (< (point) end-mod-point)
;;(if dbg (setq dbg (concat dbg (format "Pt %s Vec %s C%c Kwd'%s'\n" (point) vec (following-char) keywd))))
(cond
((looking-at "//")
(when (looking-at "[^\n]*\\(auto\\|synopsys\\)\\s +enum\\s +\\([a-zA-Z0-9_]+\\)")
(setq enum (match-string-no-properties 2)))
(search-forward "\n"))
((looking-at "/\\*")
(forward-char 2)
(when (looking-at "[^\n]*\\(auto\\|synopsys\\)\\s +enum\\s +\\([a-zA-Z0-9_]+\\)")
(setq enum (match-string-no-properties 2)))
(or (search-forward "*/")
(error "%s: Unmatched /* */, at char %d" (verilog-point-text) (point))))
;; Skip over protected sections with Base64-encoded data
((looking-at "^\\s *`pragma\\s +protect\\s +begin_protected")
(or (re-search-forward "^\\s *`pragma\\s +protect\\s +end_protected" nil t)
(forward-line)))
((looking-at "^\\s *`protected\\>")
(or (re-search-forward "^\\s *`endprotected\\>" nil t)
(forward-line)))
((looking-at "(\\*")
;; To advance past either "(*)" or "(* ... *)" don't forward past first *
(forward-char 1)
(or (looking-at "\\*\\s-*)") ; (* )
(search-forward "*)") ; end attribute
(error "%s: Unmatched (* *), at char %d" (verilog-point-text) (point))))
((eq ?\" (following-char))
(or (re-search-forward "[^\\]\"" nil t) ; don't forward-char first, since we look for a non backslash first
(error "%s: Unmatched quotes, at char %d" (verilog-point-text) (point))))
((eq ?\; (following-char))
(cond (in-ign-to-semi ; Such as inside a "import ...;" in a module header
(setq in-ign-to-semi nil rvalue nil))
((and in-modport (not (eq in-modport t))) ; end of a modport declaration
(verilog-modport-decls-set
in-modport
(verilog-decls-new sigs-out sigs-inout sigs-in
nil nil nil nil nil nil))
;; Pop from varstack to restore state to pre-clocking
(setq tmp (car varstack)
varstack (cdr varstack)
sigs-out (aref tmp 0)
sigs-inout (aref tmp 1)
sigs-in (aref tmp 2))
(setq vec nil io nil expect-signal nil newsig nil paren 0 rvalue nil
v2kargs-ok nil in-modport nil ign-prop nil))
(t
(setq vec nil io nil expect-signal nil newsig nil paren 0 rvalue nil
v2kargs-ok nil in-modport nil ign-prop nil)))
(forward-char 1))
((eq ?= (following-char))
(setq rvalue t newsig nil)
(forward-char 1))
((and (eq ?, (following-char))
(eq paren sig-paren))
(setq rvalue nil)
(forward-char 1))
;; ,'s can occur inside {} & funcs
((looking-at "[{(]")
(setq paren (1+ paren))
(forward-char 1))
((looking-at "[})]")
(setq paren (1- paren))
(forward-char 1)
(when (< paren sig-paren)
(setq expect-signal nil rvalue nil))) ; ) that ends variables inside v2k arg list
((looking-at "\\[")
(setq keywd (buffer-substring-no-properties
(point)
(progn (forward-sexp 1) (point))))
(cond (newsig ; Memory, not just width. Patch last signal added's memory (nth 3)
(setcar (cdr (cdr (cdr newsig)))
(if (verilog-sig-memory newsig)
(concat (verilog-sig-memory newsig)
keywd)
keywd)))
(vec ; Multidimensional
(setq multidim (cons vec multidim))
(setq vec (verilog-string-replace-matches
"\\s-+" "" nil nil keywd)))
(t ; Bit width
(setq vec (verilog-string-replace-matches
"\\s-+" "" nil nil keywd)))))
;; int'(a) is cast, not declaration of a
((and (looking-at "'")
(not rvalue))
(forward-char 1)
(setq expect-signal nil rvalue nil))
;; Normal or escaped identifier -- note we remember the \ if escaped
((looking-at "\\s-*\\([a-zA-Z0-9`_$]+\\|\\\\[^ \t\n\f]+\\)")
(goto-char (match-end 0))
(setq last-keywd keywd
keywd (match-string-no-properties 1))
(when (string-match "^\\\\" (match-string-no-properties 1))
(setq keywd (concat keywd " "))) ; Escaped ID needs space at end
;; Add any :: package names to same identifier
;; '*' here is for "import x::*"
(while (looking-at "\\s-*::\\s-*\\(\\*\\|[a-zA-Z0-9`_$]+\\|\\\\[^ \t\n\f]+\\)")
(goto-char (match-end 0))
(setq keywd (concat keywd "::" (match-string-no-properties 1)))
(when (string-match "^\\\\" (match-string-no-properties 1))
(setq keywd (concat keywd " ")))) ; Escaped ID needs space at end
(cond ((equal keywd "input")
(setq vec nil enum nil rvalue nil newsig nil signed nil
typedefed nil multidim nil ptype nil modport nil
expect-signal 'sigs-in io t sig-paren paren))
((equal keywd "output")
(setq vec nil enum nil rvalue nil newsig nil signed nil
typedefed nil multidim nil ptype nil modport nil
expect-signal 'sigs-out io t sig-paren paren))
((equal keywd "inout")
(setq vec nil enum nil rvalue nil newsig nil signed nil
typedefed nil multidim nil ptype nil modport nil
expect-signal 'sigs-inout io t sig-paren paren))
((equal keywd "parameter")
(setq vec nil enum nil rvalue nil signed nil
typedefed nil multidim nil ptype nil modport nil
expect-signal 'sigs-gparam io t sig-paren paren))
((member keywd '("wire" "reg" ; Fast
;; net_type
"tri" "tri0" "tri1" "triand" "trior" "trireg"
"uwire" "wand" "wor"
;; integer_atom_type
"byte" "shortint" "int" "longint" "integer" "time"
"supply0" "supply1"
;; integer_vector_type - "reg" above
"bit" "logic"
;; non_integer_type
"shortreal" "real" "realtime"
;; data_type
"string" "event" "chandle"))
(cond (io
(setq typedefed
(if typedefed (concat typedefed " " keywd) keywd)))
(t (setq vec nil enum nil rvalue nil signed nil
typedefed nil multidim nil sig-paren paren
expect-signal 'sigs-var modport nil))))
((equal keywd "assign")
(setq vec nil enum nil rvalue nil signed nil
typedefed nil multidim nil ptype nil modport nil
expect-signal 'sigs-assign sig-paren paren))
((member keywd '("localparam" "genvar"))
(setq vec nil enum nil rvalue nil signed nil
typedefed nil multidim nil ptype nil modport nil
expect-signal 'sigs-const sig-paren paren))
((member keywd '("signed" "unsigned"))
(setq signed keywd))
((member keywd '("assert" "assume" "cover" "expect" "restrict"))
(setq ign-prop t))
((member keywd '("class" "covergroup" "function"
"property" "randsequence" "sequence" "task"))
(unless ign-prop
(setq functask (1+ functask))))
((member keywd '("endclass" "endgroup" "endfunction"
"endproperty" "endsequence" "endtask"))
(setq functask (1- functask)))
((equal keywd "modport")
(setq in-modport t))
((and (equal keywd "clocking")
(not (equal last-keywd "default")))
(setq in-clocking t))
((equal keywd "import")
(when v2kargs-ok ; import in module header, not a modport import
(setq in-ign-to-semi t rvalue t)))
((equal keywd "type")
(setq ptype t))
((equal keywd "var"))
;; Ifdef? Ignore name of define
((member keywd '("`ifdef" "`ifndef" "`elsif"))
(setq rvalue t))
;; Line directive? Skip over the rest of the line
((equal keywd "`line")
(forward-line))
;; Type?
((unless ptype
(verilog-typedef-name-p keywd))
(cond (io
(setq typedefed
(if typedefed (concat typedefed " " keywd) keywd)))
(t (setq vec nil enum nil rvalue nil signed nil
typedefed keywd ; Have a type
multidim nil sig-paren paren
expect-signal 'sigs-var modport nil))))
;; Interface with optional modport in v2k arglist?
;; Skip over parsing modport, and take the interface name as the type
((and v2kargs-ok
(eq paren 1)
(not rvalue)
(or (looking-at "\\s-*#")
(looking-at "\\s-*\\(\\.\\(\\s-*[a-zA-Z`_$][a-zA-Z0-9`_$]*\\)\\|\\)\\s-*[a-zA-Z`_$][a-zA-Z0-9`_$]*")))
(when (match-end 2) (goto-char (match-end 2)))
(setq vec nil enum nil rvalue nil signed nil
typedefed keywd multidim nil ptype nil
modport (match-string-no-properties 2)
newsig nil sig-paren paren
expect-signal 'sigs-intf io t ))
;; Ignore dotted LHS assignments: "assign foo.bar = z;"
((looking-at "\\s-*\\.")
(goto-char (match-end 0))
(when (not rvalue)
(setq expect-signal nil)))
;; "modport <keywd>"
((and (eq in-modport t)
(not (member keywd verilog-keywords)))
(setq in-modport (verilog-modport-new keywd nil nil))
(setq sigs-modports (cons in-modport sigs-modports))
;; Push old sig values to stack and point to new signal list
(setq varstack (cons (vector sigs-out sigs-inout sigs-in)
varstack))
(setq sigs-in nil sigs-inout nil sigs-out nil))
;; "modport x (clocking <keywd>)"
((and in-modport in-clocking)
(verilog-modport-clockings-add in-modport keywd)
(setq in-clocking nil))
;; endclocking
((and in-clocking
(equal keywd "endclocking"))
(unless (eq in-clocking t)
(verilog-modport-decls-set
in-clocking
(verilog-decls-new sigs-out sigs-inout sigs-in
nil nil nil nil nil nil))
;; Pop from varstack to restore state to pre-clocking
(setq tmp (car varstack)
varstack (cdr varstack)
sigs-out (aref tmp 0)
sigs-inout (aref tmp 1)
sigs-in (aref tmp 2)))
(setq in-clocking nil))
;; "clocking <keywd>"
((and (eq in-clocking t)
(not (member keywd verilog-keywords)))
(setq in-clocking (verilog-modport-new keywd nil nil))
(setq sigs-modports (cons in-clocking sigs-modports))
;; Push old sig values to stack and point to new signal list
(setq varstack (cons (vector sigs-out sigs-inout sigs-in)
varstack))
(setq sigs-in nil sigs-inout nil sigs-out nil))
;; New signal, maybe?
((and expect-signal
(not rvalue)
(eq functask 0)
(not (member keywd verilog-keywords))
(or (not io) (eq paren sig-paren)))
;; Add new signal to expect-signal's variable
;;(if dbg (setq dbg (concat dbg (format "Pt %s New sig %s'\n" (point) keywd))))
(setq newsig (verilog-sig-new keywd vec nil nil enum signed typedefed multidim modport))
(set expect-signal (cons newsig
(symbol-value expect-signal))))))
(t
(forward-char 1)))
(skip-syntax-forward " "))
;; Return arguments
(setq tmp (verilog-decls-new (nreverse sigs-out)
(nreverse sigs-inout)
(nreverse sigs-in)
(nreverse sigs-var)
(nreverse sigs-modports)
(nreverse sigs-assign)
(nreverse sigs-const)
(nreverse sigs-gparam)
(nreverse sigs-intf)))
;;(if dbg (verilog-decls-princ tmp))
tmp)))