Function: vhdl-port-paste-testbench
vhdl-port-paste-testbench is an interactive and byte-compiled function
defined in vhdl-mode.el.gz.
Signature
(vhdl-port-paste-testbench)
Documentation
Paste as a bare-bones testbench.
Key Bindings
Source Code
;; Defined in /usr/src/emacs/lisp/progmodes/vhdl-mode.el.gz
(defun vhdl-port-paste-testbench ()
"Paste as a bare-bones testbench."
(interactive)
(if (not vhdl-port-list)
(error "ERROR: No port read")
(let ((case-fold-search t)
(ent-name (vhdl-replace-string vhdl-testbench-entity-name
(nth 0 vhdl-port-list)))
;; (source-buffer (current-buffer))
arch-name config-name ent-file-name arch-file-name
ent-buffer arch-buffer position)
;; open entity file
(unless (eq vhdl-testbench-create-files 'none)
(setq ent-file-name
(concat (vhdl-replace-string vhdl-testbench-entity-file-name
ent-name t)
"." (file-name-extension (buffer-file-name))))
(if (file-exists-p ent-file-name)
(if (y-or-n-p
(concat "File \"" ent-file-name "\" exists; overwrite? "))
(progn (find-file ent-file-name)
(erase-buffer)
(set-buffer-modified-p nil))
(if (eq vhdl-testbench-create-files 'separate)
(setq ent-file-name nil)
(error "ERROR: Pasting port as testbench...aborted")))
(find-file ent-file-name)))
(unless (and (eq vhdl-testbench-create-files 'separate)
(null ent-file-name))
;; paste entity header
(if vhdl-testbench-include-header
(progn (vhdl-template-header
(concat "Testbench for design \""
(nth 0 vhdl-port-list) "\""))
(goto-char (point-max)))
(vhdl-comment-display-line) (insert "\n\n"))
;; paste std_logic_1164 package
(when vhdl-testbench-include-library
(vhdl-template-package-std-logic-1164)
(insert "\n\n") (vhdl-comment-display-line) (insert "\n\n"))
;; paste entity declaration
(vhdl-insert-keyword "ENTITY ")
(insert ent-name)
(vhdl-insert-keyword " IS")
(when (memq vhdl-insert-empty-lines '(unit all)) (insert "\n"))
(insert "\n")
(vhdl-insert-keyword "END ")
(unless (vhdl-standard-p '87) (vhdl-insert-keyword "ENTITY "))
(insert ent-name ";")
(insert "\n\n")
(vhdl-comment-display-line) (insert "\n"))
;; get architecture name
(setq arch-name (if (equal (cdr vhdl-testbench-architecture-name) "")
(read-from-minibuffer "architecture name: "
nil vhdl-minibuffer-local-map)
(vhdl-replace-string vhdl-testbench-architecture-name
(nth 0 vhdl-port-list))))
(message "Pasting port as testbench \"%s(%s)\"..." ent-name arch-name)
;; open architecture file
(if (not (eq vhdl-testbench-create-files 'separate))
(insert "\n")
(setq ent-buffer (current-buffer))
(setq arch-file-name
(concat (vhdl-replace-string vhdl-testbench-architecture-file-name
(concat ent-name " " arch-name) t)
"." (file-name-extension (buffer-file-name))))
(when (and (file-exists-p arch-file-name)
(not (y-or-n-p (concat "File \"" arch-file-name
"\" exists; overwrite? "))))
(error "ERROR: Pasting port as testbench...aborted"))
(find-file arch-file-name)
(erase-buffer)
(set-buffer-modified-p nil)
;; paste architecture header
(if vhdl-testbench-include-header
(progn (vhdl-template-header
(concat "Testbench architecture for design \""
(nth 0 vhdl-port-list) "\""))
(goto-char (point-max)))
(vhdl-comment-display-line) (insert "\n\n")))
;; paste architecture body
(vhdl-insert-keyword "ARCHITECTURE ")
(insert arch-name)
(vhdl-insert-keyword " OF ")
(insert ent-name)
(vhdl-insert-keyword " IS")
(insert "\n\n") (indent-to vhdl-basic-offset)
;; paste component declaration
(unless (vhdl-use-direct-instantiation)
(vhdl-port-paste-component t)
(insert "\n\n") (indent-to vhdl-basic-offset))
;; paste constants
(when (nth 1 vhdl-port-list)
(insert "-- component generics\n") (indent-to vhdl-basic-offset)
(vhdl-port-paste-constants t)
(insert "\n\n") (indent-to vhdl-basic-offset))
;; paste internal signals
(insert "-- component ports\n") (indent-to vhdl-basic-offset)
(vhdl-port-paste-signals vhdl-testbench-initialize-signals t)
(insert "\n")
;; paste custom declarations
(unless (equal "" vhdl-testbench-declarations)
(insert "\n")
(setq position (point))
(vhdl-insert-string-or-file vhdl-testbench-declarations)
(indent-region position (point)))
(setq position (point))
(insert "\n\n")
(vhdl-comment-display-line) (insert "\n")
(when vhdl-testbench-include-configuration
(setq config-name (vhdl-replace-string
vhdl-testbench-configuration-name
(concat ent-name " " arch-name)))
(insert "\n")
(vhdl-insert-keyword "CONFIGURATION ") (insert config-name)
(vhdl-insert-keyword " OF ") (insert ent-name)
(vhdl-insert-keyword " IS\n")
(indent-to vhdl-basic-offset)
(vhdl-insert-keyword "FOR ") (insert arch-name "\n")
(indent-to vhdl-basic-offset)
(vhdl-insert-keyword "END FOR;\n")
(vhdl-insert-keyword "END ") (insert config-name ";\n\n")
(vhdl-comment-display-line) (insert "\n"))
(goto-char position)
(vhdl-template-begin-end
(unless (vhdl-standard-p '87) "ARCHITECTURE") arch-name 0 t)
;; paste instantiation
(insert "-- component instantiation\n") (indent-to vhdl-basic-offset)
(vhdl-port-paste-instance
(vhdl-replace-string vhdl-testbench-dut-name (nth 0 vhdl-port-list)) t)
(insert "\n")
;; paste custom statements
(unless (equal "" vhdl-testbench-statements)
(insert "\n")
(setq position (point))
(vhdl-insert-string-or-file vhdl-testbench-statements)
(indent-region position (point)))
(insert "\n")
(indent-to vhdl-basic-offset)
(unless (eq vhdl-testbench-create-files 'none)
(setq arch-buffer (current-buffer))
(when ent-buffer (set-buffer ent-buffer) (save-buffer))
(set-buffer arch-buffer) (save-buffer))
(message "%s"
(concat (format "Pasting port as testbench \"%s(%s)\"...done"
ent-name arch-name)
(and ent-file-name
(format "\n File created: \"%s\"" ent-file-name))
(and arch-file-name
(format "\n File created: \"%s\"" arch-file-name)))))))