Function: verilog-auto-unused
verilog-auto-unused is an interactive and byte-compiled function
defined in verilog-mode.el.gz.
Signature
(verilog-auto-unused)
Documentation
Expand AUTOUNUSED statements, as part of M-x verilog-auto (verilog-auto).
Replace the /*AUTOUNUSED*/ comment with a comma separated list of all unused input and inout signals.
/*AUTOUNUSED*/ is used to make stub modules; modules that have the same
input/output list as another module, but no internals. Specifically, it
finds all inputs and inouts in the module, and if that input is not otherwise
used, adds it to a comma separated list.
The comma separated list is intended to be used to create a _unused_ok signal. Using the exact name "_unused_ok" for name of the temporary signal is recommended as it will insure maximum forward compatibility, it also makes lint warnings easy to understand; ignore any unused warnings with "unused" in the signal name.
To reduce simulation time, the _unused_ok signal should be forced to a constant to prevent wiggling. The easiest thing to do is use a reduction-and with 1'b0 as shown.
This way all unused signals are in one place, making it convenient to add your tool's specific pragmas around the assignment to disable any unused warnings.
You can add signals you do not want included in AUTOUNUSED with
verilog-auto-unused-ignore-regexp.
An example of making a stub for another module:
module ExampMain
(input unused_input_a, input unused_input_b);
endmodule
module ExampStub2 (/*AUTOARG*/);
/*AUTOINOUTPARAM("ExampMain")*/
/*AUTOINOUTMODULE("ExampMain")*/
/*AUTOTIEOFF*/
// verilator lint_off UNUSED
wire _unused_ok = &{1'b0,
/*AUTOUNUSED*/
1'b0};
// verilator lint_on UNUSED
endmodule
Typing M-x verilog-auto (verilog-auto) will make this into:
...
// verilator lint_off UNUSED
wire _unused_ok = &{1'b0,
/*AUTOUNUSED*/
// Beginning of automatics
unused_input_a,
unused_input_b
// End of automatics
1'b0};
// verilator lint_on UNUSED
endmodule
Key Bindings
Source Code
;; Defined in /usr/src/emacs/lisp/progmodes/verilog-mode.el.gz
(defun verilog-auto-unused ()
"Expand AUTOUNUSED statements, as part of \\[verilog-auto].
Replace the /*AUTOUNUSED*/ comment with a comma separated list of all unused
input and inout signals.
/*AUTOUNUSED*/ is used to make stub modules; modules that have the same
input/output list as another module, but no internals. Specifically, it
finds all inputs and inouts in the module, and if that input is not otherwise
used, adds it to a comma separated list.
The comma separated list is intended to be used to create a _unused_ok
signal. Using the exact name \"_unused_ok\" for name of the temporary
signal is recommended as it will insure maximum forward compatibility, it
also makes lint warnings easy to understand; ignore any unused warnings
with \"unused\" in the signal name.
To reduce simulation time, the _unused_ok signal should be forced to a
constant to prevent wiggling. The easiest thing to do is use a
reduction-and with 1\\='b0 as shown.
This way all unused signals are in one place, making it convenient to add
your tool's specific pragmas around the assignment to disable any unused
warnings.
You can add signals you do not want included in AUTOUNUSED with
`verilog-auto-unused-ignore-regexp'.
An example of making a stub for another module:
module ExampMain
(input unused_input_a, input unused_input_b);
endmodule
module ExampStub2 (/*AUTOARG*/);
/*AUTOINOUTPARAM(\"ExampMain\")*/
/*AUTOINOUTMODULE(\"ExampMain\")*/
/*AUTOTIEOFF*/
// verilator lint_off UNUSED
wire _unused_ok = &{1\\='b0,
/*AUTOUNUSED*/
1\\='b0};
// verilator lint_on UNUSED
endmodule
Typing \\[verilog-auto] will make this into:
...
// verilator lint_off UNUSED
wire _unused_ok = &{1\\='b0,
/*AUTOUNUSED*/
// Beginning of automatics
unused_input_a,
unused_input_b
// End of automatics
1\\='b0};
// verilator lint_on UNUSED
endmodule"
(interactive)
(save-excursion
;; Find beginning
(let* ((indent-pt (progn (search-backward "/*") (current-column)))
(modi (verilog-modi-current))
(moddecls (verilog-modi-get-decls modi))
(modsubdecls (verilog-modi-get-sub-decls modi))
(sig-list (verilog-signals-not-in
(append (verilog-decls-get-inputs moddecls)
(verilog-decls-get-inouts moddecls))
(append (verilog-subdecls-get-inputs modsubdecls)
(verilog-subdecls-get-inouts modsubdecls)))))
(setq sig-list (verilog-signals-not-matching-regexp
sig-list verilog-auto-unused-ignore-regexp))
(when sig-list
(verilog-forward-or-insert-line)
(verilog-insert-indent "// Beginning of automatic unused inputs\n")
(setq sig-list (sort (copy-alist sig-list) #'verilog-signals-sort-compare))
(while sig-list
(let ((sig (car sig-list)))
(indent-to indent-pt)
(insert (verilog-sig-name sig) ",\n")
(setq sig-list (cdr sig-list))))
(verilog-insert-indent "// End of automatics\n")))))