File: verilog-mode.el.html
USAGE
=====
A major mode for editing Verilog and SystemVerilog HDL source code (IEEE
1364-2005 and IEEE 1800-2012 standards). When you have entered Verilog
mode, you may get more info by pressing C-h m. You may also get online
help describing various functions by: C-h f <Name of function you want
described>
KNOWN BUGS / BUG REPORTS
=======================
SystemVerilog is a rapidly evolving language, and hence this mode is under continuous development. Please report any issues to the issue tracker at
https://www.veripool.org/verilog-mode
Please use verilog-submit-bug-report to submit a report; type C-c C-b to invoke this and as a result we will have a much easier time of reproducing the bug you find, and hence fixing it.
INSTALLING THE MODE
===================
An older version of this mode may be already installed as a part of your environment, and one method of updating would be to update your Emacs environment. Sometimes this is difficult for local political/control reasons, and hence you can always install a private copy (or even a shared copy) which overrides the system default.
You can get step by step help in installing this file by going to
<https://www.veripool.org/verilog-mode>
The short list of installation instructions are: To set up
automatic Verilog mode, put this file in your load path, and put
the following in code (please un comment it first!) in your
.emacs, or in your site's site-load.el
(autoload 'verilog-mode "verilog-mode" "Verilog mode" t )
(add-to-list 'auto-mode-alist '("\\\\.[ds]?va?h?\\\\'" . verilog-mode))
Be sure to examine at the help for verilog-auto, and the other verilog-auto-* functions for some major coding time savers.
If you want to customize Verilog mode to fit your needs better, you may add the below lines (the values of the variables presented here are the defaults). Note also that if you use an Emacs that supports custom, it's probably better to use the custom menu to edit these. If working as a member of a large team these settings should be common across all users (in a site-start file), or set in Local Variables in every file. Otherwise, different people's AUTO expansion may result different whitespace changes.
;; Enable syntax highlighting of **all** languages
(global-font-lock-mode t)
;; User customization for Verilog mode
(setq verilog-indent-level 3
verilog-indent-level-module 3
verilog-indent-level-declaration 3
verilog-indent-level-behavioral 3
verilog-indent-level-directive 1
verilog-case-indent 2
verilog-auto-newline t
verilog-auto-indent-on-newline t
verilog-tab-always-indent t
verilog-auto-endcomments t
verilog-minimum-comment-distance 40
verilog-indent-begin-after-if t
verilog-auto-lineup 'declarations
verilog-linter "my_lint_shell_command"
)
Defined variables (170)
verilog-active-low-regexp | If true, treat signals matching this regexp as active low. |
verilog-after-save-font-hook | Hook run after ‘verilog-save-font-no-change-functions’ restores highlighting. |
verilog-align-assign-expr | Non-nil means align expressions of continuous assignments. |
verilog-align-comment-distance | Distance (in spaces) between longest declaration/expression and comments. |
verilog-align-decl-expr-comments | Non-nil means align declaration and expressions comments. |
verilog-align-ifelse | Non-nil means align ‘else’ under matching ‘if’. |
verilog-align-typedef-regexp | Regexp that matches user typedefs for declaration alignment. |
verilog-align-typedef-words | List of words that match user typedefs for declaration alignment. |
verilog-assignment-delay | Text used for delays in delayed assignments. Add a trailing space if set. |
verilog-auto-arg-format | Formatting to use for AUTOARG signal names. |
verilog-auto-arg-sort | Non-nil means AUTOARG signal names will be sorted, not in declaration order. |
verilog-auto-declare-nettype | Non-nil specifies the data type to use with ‘verilog-auto-input’ etc. |
verilog-auto-delete-trailing-whitespace | Non-nil means to ‘delete-trailing-whitespace’ in ‘verilog-auto’. |
verilog-auto-endcomments | Non-nil means insert a comment /* ... */ after ‘end’s. |
verilog-auto-hook | Hook run after ‘verilog-mode’ updates AUTOs. |
verilog-auto-ignore-concat | Non-nil means ignore signals in {...} concatenations for AUTOWIRE etc. |
verilog-auto-indent-on-newline | Non-nil means automatically indent line after newline. |
verilog-auto-inout-ignore-regexp | If non-nil, when creating AUTOINOUT, ignore signals matching this regexp. |
verilog-auto-input-ignore-regexp | If non-nil, when creating AUTOINPUT, ignore signals matching this regexp. |
verilog-auto-inst-column | Indent-to column number for net name part of AUTOINST created pin. |
verilog-auto-inst-dot-name | Non-nil means when creating ports with AUTOINST, use .name syntax. |
verilog-auto-inst-first-any | Local first-in-any-section for ‘verilog-auto-inst-first’. |
verilog-auto-inst-first-section | Local first-in-section for ‘verilog-auto-inst-first’. |
verilog-auto-inst-interfaced-ports | Non-nil means include interfaced ports in AUTOINST expansions. |
verilog-auto-inst-param-value | Non-nil means AUTOINST will replace parameters with the parameter value. |
verilog-auto-inst-param-value-type | Non-nil means expand parameter type in instantiations. |
verilog-auto-inst-sort | Non-nil means AUTOINST signals will be sorted, not in declaration order. |
verilog-auto-inst-template-numbers | If true, when creating templated ports with AUTOINST, add a comment. |
verilog-auto-inst-template-required | If non-nil, when creating a port with AUTOINST, require a template. |
verilog-auto-inst-vector | Non-nil means when creating default ports with AUTOINST, use bus subscripts. |
verilog-auto-last-file-locals | Text from file-local-variables during last evaluation. |
verilog-auto-lineup | Type of statements to lineup across multiple lines. |
verilog-auto-newline | Non-nil means automatically newline after semicolons. |
verilog-auto-output-ignore-regexp | If non-nil, when creating AUTOOUTPUT, ignore signals matching this regexp. |
verilog-auto-read-includes | Non-nil means to automatically read includes before AUTOs. |
verilog-auto-reg-input-assigned-ignore-regexp | If non-nil, when creating AUTOINPUTREG, ignore signals matching this regexp. |
verilog-auto-reset-blocking-in-non | Non-nil means AUTORESET will reset blocking statements. |
verilog-auto-reset-widths | Non-nil means AUTORESET should determine the width of signals. |
verilog-auto-save-policy | Non-nil indicates action to take when saving a Verilog buffer with AUTOs. |
verilog-auto-sense-defines-constant | Non-nil means AUTOSENSE should assume all defines represent constants. |
verilog-auto-sense-include-inputs | Non-nil means AUTOSENSE should include all inputs. |
verilog-auto-simplify-expressions | Non-nil means AUTOs will simplify expressions when calculating bit ranges. |
verilog-auto-star-expand | Non-nil means to expand SystemVerilog .* instance ports. |
verilog-auto-star-save | Non-nil means save to disk SystemVerilog .* instance expansions. |
verilog-auto-template-hits | Successful lookups with ‘verilog-read-auto-template-hit’. |
verilog-auto-template-warn-unused | Non-nil means report warning if an AUTO_TEMPLATE line is not used. |
verilog-auto-tieoff-declaration | Data type used for the declaration for AUTOTIEOFF. |
verilog-auto-tieoff-ignore-regexp | If non-nil, when creating AUTOTIEOFF, ignore signals matching this regexp. |
verilog-auto-unused-ignore-regexp | If non-nil, when creating AUTOUNUSED, ignore signals matching this regexp. |
verilog-auto-update-tick | Modification tick at which autos were last performed. |
verilog-auto-wire-comment | Non-nil indicates to insert to/from comments with ‘verilog-auto-wire’ etc. |
verilog-auto-wire-type | Non-nil specifies the data type to use with ‘verilog-auto-wire’ etc. |
verilog-before-auto-hook | Hook run before ‘verilog-mode’ updates AUTOs. |
verilog-before-delete-auto-hook | Hook run before ‘verilog-mode’ deletes AUTOs. |
verilog-before-getopt-flags-hook | Hook run before ‘verilog-getopt-flags’ determines the Verilog option lists. |
verilog-before-save-font-hook | Hook run before ‘verilog-save-font-no-change-functions’ removes highlighting. |
verilog-block-keywords | Keywords to complete when at first word of a line in behavioral scope. |
verilog-cache-enabled | Non-nil enables caching of signals, etc. |
verilog-cache-has-lisp | Non-nil if any AUTO_LISP in buffer. |
verilog-case-fold | Non-nil means ‘verilog-mode’ regexps should ignore case. |
verilog-case-indent | Indentation for case statements. |
verilog-case-keywords | Keywords to complete when at first word of a line in case scope. |
verilog-cexp-indent | Indentation of Verilog statements split across lines. |
verilog-comment-start-regexp | Dual comment value for ‘comment-start-regexp’. |
verilog-company | Default name of Company for Verilog header. |
verilog-compiler | Program and arguments to use to compile Verilog source. |
verilog-compiler-directives | List of Verilog compiler directives. |
verilog-coverage | Program and arguments to use to annotate for coverage Verilog source. |
verilog-cpp-keywords | Keywords to complete when at first word of a line in declarative scope. |
verilog-date-scientific-format | If non-nil, dates are written in scientific format (e.g. 1997/09/17). |
verilog-debug | Non-nil means enable debug messages for ‘verilog-mode’ internals. |
verilog-declaration-embedded-comments-re | Match expressions such as: input logic [7:0] /* auto enum sm_psm */ sm_psm;. |
verilog-defun-keywords | Keywords to complete when at first word of a line in declarative scope. |
verilog-delete-auto-hook | Hook run after ‘verilog-mode’ deletes AUTOs. |
verilog-diff-function | Function to run when ‘verilog-diff-auto’ detects differences. |
verilog-diff-ignore-regexp | Non-nil specifies regexp which ‘verilog-diff-auto’ will ignore. |
verilog-dir-cache-lib-filenames | Cached data for ‘verilog-library-filenames’. |
verilog-dir-cache-list | Alist of (((Cwd Dirname) Results)...) for caching ‘verilog-dir-files’. |
verilog-dir-cache-preserving | If true, the directory cache is enabled, and file system changes are ignored. |
verilog-error-font-lock-keywords | Keywords to also highlight in Verilog *compilation* buffers. |
verilog-error-regexp-emacs-alist | List of regexps for Verilog compilers. |
verilog-error-regexp-xemacs-alist | List of regexps for Verilog compilers. |
verilog-exclude-str-end | String used to mark end of excluded text. |
verilog-exclude-str-start | String used to mark beginning of excluded text. |
verilog-font-lock-ams-face | Font to use for Analog/Mixed Signal keywords. |
verilog-font-lock-grouping-keywords-face | Font to use for Verilog Grouping Keywords (such as begin..end). |
verilog-font-lock-keywords | Default highlighting for Verilog mode. |
verilog-font-lock-keywords-1 | Subdued level highlighting for Verilog mode. |
verilog-font-lock-keywords-2 | Medium level highlighting for Verilog mode. |
verilog-font-lock-keywords-3 | Gaudy level highlighting for Verilog mode. |
verilog-font-lock-p1800-face | Obsolete font to use for p1800 keywords. |
verilog-font-lock-translate-off-face | Font to use for translated off regions. |
verilog-fontify-variables | Non-nil means fontify declaration variables. |
verilog-gate-ios | Map of direction for each positional argument to each gate primitive. |
verilog-gate-keywords | Keywords for gate primitives. |
verilog-getopt-flags-hook | Hook run after ‘verilog-getopt-flags’ determines the Verilog option lists. |
verilog-highlight-grouping-keywords | Non-nil means highlight grouping keywords more dramatically. |
verilog-highlight-includes | Non-nil means highlight module statements for ‘verilog-load-file-at-point’. |
verilog-highlight-max-lookahead | Maximum size of declaration statement that undergoes highlighting. |
verilog-highlight-modules | Non-nil means highlight module statements for ‘verilog-load-file-at-point’. |
verilog-highlight-p1800-keywords | Obsolete. |
verilog-highlight-translate-off | Non-nil means background-highlight code excluded from translation. |
verilog-imenu-generic-expression | Imenu expression for Verilog mode. See ‘imenu-generic-expression’. |
verilog-in-hooks | Non-nil when within a ‘verilog-run-hooks’ block. |
verilog-include-file-regexp | Regexp that matches the include file. |
verilog-indent-begin-after-if | Non-nil means indent begin statements following if, else, while, etc. |
verilog-indent-class-inside-pkg | Non-nil means indent classes inside packages. |
verilog-indent-declaration-macros | How to treat macro expansions in a declaration. |
verilog-indent-ignore-multiline-defines | Non-nil means ignore indentation on lines that are part of a multiline define. |
verilog-indent-ignore-regexp | Regexp that matches lines that should be ignored for indentation. |
verilog-indent-level | Indentation of Verilog statements with respect to containing block. |
verilog-indent-level-behavioral | Absolute indentation of first begin in a task or function block. |
verilog-indent-level-declaration | Indentation of declarations with respect to containing block. |
verilog-indent-level-directive | Indentation to add to each level of `ifdef declarations. |
verilog-indent-level-module | Indentation of Module level Verilog statements (eg always, initial). |
verilog-indent-lists | How to treat indenting items in a list. |
verilog-keywords | List of Verilog keywords. |
verilog-library-directories | List of directories when looking for files for /*AUTOINST*/. |
verilog-library-extensions | List of extensions to use when looking for files for /*AUTOINST*/. |
verilog-library-files | List of files to search for modules. |
verilog-library-flags | List of standard Verilog arguments to use for /*AUTOINST*/. |
verilog-linter | Unix program and arguments to call to run a lint checker on Verilog source. |
verilog-menu | Menu for Verilog mode. |
verilog-minimum-comment-distance | Minimum distance (in lines) between begin and end required before a comment. |
verilog-mode-abbrev-table | Abbrev table for Verilog mode skeletons. |
verilog-mode-hook | Hook run after Verilog mode is loaded. |
verilog-mode-map | Keymap used in Verilog mode. |
verilog-mode-mouse-map | Map containing mouse bindings for ‘verilog-mode’. |
verilog-mode-release-emacs | If non-nil, this version of Verilog mode was released with Emacs itself. |
verilog-mode-syntax-table | Syntax table used in Verilog mode buffers. |
verilog-mode-version | Version of this Verilog mode. |
verilog-modi-cache-current | Currently active ‘verilog-modi-current’, if any, set by let(). |
verilog-modi-cache-current-enable | Non-nil means allow caching ‘verilog-modi-current’, set by let(). |
verilog-modi-cache-current-max | Current endmodule point for ‘verilog-modi-cache-current’, if any. |
verilog-modi-cache-list | Cache of ((Module Function) Buf-Tick Buf-Modtime Func-Returns)... |
verilog-modi-cache-preserve-buffer | Modification tick after which the cache is still considered valid. |
verilog-modi-cache-preserve-tick | Modification tick after which the cache is still considered valid. |
verilog-modi-lookup-cache | Hash of (modulename modi). |
verilog-modi-lookup-last-current | Cache of ‘current-buffer’ at last lookup. |
verilog-modi-lookup-last-tick | Cache of ‘buffer-chars-modified-tick’ at last lookup. |
verilog-no-change-functions | Non-nil if ‘after-change-functions’ is disabled. |
verilog-preprocess-history | History for ‘verilog-preprocess’. |
verilog-preprocessor | Program and arguments to use to preprocess Verilog source. |
verilog-project | Default name of Project for Verilog header. |
verilog-read-sub-decls-gate-ios | For ‘verilog-read-sub-decls’, gate IO pins remaining, nil if non-primitive. |
verilog-read-sub-decls-in-interfaced | For ‘verilog-read-sub-decls’, process next signal as under interfaced block. |
verilog-save-font-mod-hooked | Local variable when inside a ‘verilog-save-font-no-change-functions’ block. |
verilog-scan-cache-preserving | If true, the specified buffer’s comment properties are static. |
verilog-scan-cache-tick | Modification tick at which ‘verilog-scan’ was last completed. |
verilog-separator-keywords | Keywords to complete when NOT standing at the first word of a statement. |
verilog-simulator | Program and arguments to use to interpret Verilog source. |
verilog-stmt-menu | Menu for statement templates in Verilog. |
verilog-tab-always-indent | Non-nil means TAB should always re-indent the current line. |
verilog-tab-to-comment | Non-nil means TAB moves to the right hand column in preparation for a comment. |
verilog-template-map | Keymap used in Verilog mode for smart template operations. |
verilog-tf-keywords | Keywords to complete when at first word of a line in a task or function. |
verilog-toggle-completions | Non-nil means M-x verilog-complete-word should try all possible completions one by one. |
verilog-tool | Which tool to use for building compiler-command. |
verilog-type-keywords | Keywords for types used when completing a word in a declaration or parmlist. |
verilog-typedef-regexp | If non-nil, regular expression that matches Verilog-2001 typedef names. |
verilog-warn-fatal | Non-nil means ‘verilog-warn-error’ warnings are fatal ‘error’s. |
vl-bits | See ‘verilog-auto-inst’. |
vl-cell-name | See ‘verilog-auto-inst’. |
vl-cell-type | See ‘verilog-auto-inst’. |
vl-dir | See ‘verilog-auto-inst’. |
vl-mbits | See ‘verilog-auto-inst’. |
vl-memory | See ‘verilog-auto-inst’. |
vl-modport | See ‘verilog-auto-inst’. |
vl-name | See ‘verilog-auto-inst’. |
vl-width | See ‘verilog-auto-inst’. |
Defined functions (466)
Defined faces (4)
verilog-font-lock-ams-face | Font lock mode face used to highlight AMS keywords. |
verilog-font-lock-grouping-keywords-face | Font lock mode face used to highlight verilog grouping keywords. |
verilog-font-lock-p1800-face | Font lock mode face used to highlight P1800 keywords. |
verilog-font-lock-translate-off-face | Font lock mode face used to background highlight translate-off regions. |