File: vhdl-mode.el.html

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This package provides an Emacs major mode for editing VHDL code. It includes the following features:

  - Syntax highlighting
  - Indentation
  - Template insertion (electrification)
  - Insertion of file headers
  - Insertion of user-specified models
  - Port translation / testbench generation
  - Structural composition
  - Configuration generation
  - Sensitivity list updating
  - File browser
  - Design hierarchy browser
  - Source file compilation (syntax analysis)
  - Makefile generation
  - Code hiding
  - Word/keyword completion
  - Block commenting
  - Code fixing/alignment/beautification
  - PostScript printing
  - VHDL'87/'93/'02/'08 and VHDL-AMS supported
  - Comprehensive menu
  - Fully customizable
  - Works under GNU Emacs (recommended) and XEmacs

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Documentation

See comment string of function vhdl-mode or type C-c C-h in Emacs.

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Emacs Versions

this updated version was only tested on: GNU Emacs 24.1

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Installation

Prerequisites: GNU Emacs >= 21, XEmacs 20/21.

Put vhdl-mode.el into the site-lisp directory of your Emacs installation or into an arbitrary directory that is added to the load path by the following line in your Emacs start-up file .emacs:

  (push (expand-file-name "<directory-name>") load-path)

If you already have the compiled vhdl-mode.elc file, put it in the same directory. Otherwise, byte-compile the source file:
  Emacs: M-x byte-compile-file RET vhdl-mode.el RET
  Unix: emacs -batch -q -no-site-file -f batch-byte-compile vhdl-mode.el

Add the following lines to the site-start.el file in the site-lisp directory of your Emacs installation or to your Emacs start-up file .emacs
(not required in Emacs):

  (autoload 'vhdl-mode "vhdl-mode" "VHDL Mode" t)
  (push '("\\\\.vhdl?\\\\'" . vhdl-mode) auto-mode-alist)

More detailed installation instructions are included in the official VHDL Mode distribution.

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Acknowledgments

Electrification ideas by Bob Pack <rlpst@cislabs.pitt.edu> and Steve Grout.

Fontification approach suggested by Ken Wood <ken@eda.com.au>. Ideas about alignment from John Wiegley <johnw@gnu.org>.

Many thanks to all the users who sent me bug reports and enhancement requests. Thanks to Colin Marquardt for his serious beta testing, his innumerable enhancement suggestions and the fruitful discussions. Thanks to Dan Nicolaescu for reviewing the code and for his valuable hints. Thanks to Ulf Klaperski for the indentation speedup hint.

Special thanks go to Wolfgang Fichtner and the crew from the Integrated Systems Laboratory, Swiss Federal Institute of Technology Zurich, for giving me the opportunity to develop this code. This work has been funded in part by MICROSWISS, a Microelectronics Program of the Swiss Government.

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Defined variables (258)

vhdl--progress-reporterHolds the progress reporter data during long running operations.
vhdl--signal-regions-functionsDefine syntactic regions where signals are read.
vhdl-02-attributesList of VHDL’02 standardized attributes.
vhdl-02-enum-valuesList of VHDL’02 standardized enumeration values.
vhdl-02-functionsList of VHDL’02 standardized functions.
vhdl-02-keywordsList of VHDL’02 keywords.
vhdl-02-packagesList of VHDL’02 standardized packages and libraries.
vhdl-02-typesList of VHDL’02 standardized types.
vhdl-08-attributesList of VHDL’08 standardized attributes.
vhdl-08-directivesList of VHDL’08 standardized tool directives.
vhdl-08-functionsList of VHDL’08 standardized functions.
vhdl-08-keywordsList of VHDL’08 keywords.
vhdl-08-packagesList of VHDL’08 standardized packages and libraries.
vhdl-08-typesList of VHDL’08 standardized types.
vhdl-abbrev-listPredefined abbreviations for VHDL.
vhdl-actual-generic-nameSpecifies how actual generic names are obtained from formal generic names.
vhdl-actual-port-nameSpecifies how actual port names are obtained from formal port names.
vhdl-align-alistThe format of this alist is (MODES [or MODE] REGEXP ALIGN-PATTERN SUBEXP).
vhdl-align-group-separateRegexp for matching a line that separates groups of lines for alignment.
vhdl-align-groupsNon-nil means align groups of code lines separately.
vhdl-align-same-indentNon-nil means align blocks with same indent separately.
vhdl-align-try-all-clausesIf REGEXP is not found on the first line of the region that clause is ignored.
vhdl-ams-attributesList of VHDL-AMS standardized attributes.
vhdl-ams-constantsList of VHDL-AMS standardized constants.
vhdl-ams-enum-valuesList of VHDL-AMS standardized enumeration values.
vhdl-ams-functionsList of VHDL-AMS standardized functions.
vhdl-ams-keywordsList of VHDL-AMS keywords.
vhdl-ams-packagesList of VHDL-AMS standardized packages and libraries.
vhdl-ams-typesList of VHDL-AMS standardized types.
vhdl-architecture-file-nameSpecifies how the architecture file name is obtained.
vhdl-argument-list-indentNon-nil means indent argument lists relative to opening parenthesis.
vhdl-array-index-record-field-in-sensitivity-listNon-nil means include array indices / record fields in sensitivity list.
vhdl-association-list-with-formalsNon-nil means write association lists with formal parameters.
vhdl-attributesList of VHDL standardized attributes.
vhdl-attributes-regexpRegexp for VHDL standardized attributes.
vhdl-auto-alignNon-nil means align some templates automatically after generation.
vhdl-basic-offsetAmount of basic offset used for indentation.
vhdl-beautify-optionsList of options for beautifying code.
vhdl-begin-bwd-reRegexp for searching backward that matches all known "begin" keywords.
vhdl-begin-fwd-reRegexp for searching forward that matches all known "begin" keywords.
vhdl-case-alternative-reRegexp describing a case statement alternative key.
vhdl-case-header-keyRegexp describing a case statement header key.
vhdl-clock-edge-conditionSyntax of the clock edge condition.
vhdl-clock-nameName of clock signal to use in templates.
vhdl-clock-rising-edgeNon-nil means rising edge of clock triggers sequential processes.
vhdl-comment-display-line-charCharacter to use in comment display line.
vhdl-comment-only-line-offsetExtra offset for line which contains only the start of a comment.
vhdl-company-nameName of company to insert in file header.
vhdl-compile-absolute-pathIf non-nil, use absolute instead of relative path for compiled files.
vhdl-compile-file-nameName of file to be compiled.
vhdl-compile-post-commandString appended to compile command after file name.
vhdl-compile-use-local-error-regexpNon-nil means use buffer-local ‘compilation-error-regexp-alist’.
vhdl-compilerSpecifies the VHDL compiler to be used for syntax analysis.
vhdl-compiler-alistList of available VHDL compilers and their properties.
vhdl-components-package-nameSpecifies how the name for the components package is obtained.
vhdl-compose-architecture-nameSpecifies how the component architecture name is obtained.
vhdl-compose-configuration-create-fileSpecifies whether a new file should be created for the configuration.
vhdl-compose-configuration-hierarchicalSpecifies whether hierarchical configurations should be created.
vhdl-compose-configuration-nameSpecifies how the configuration name is obtained.
vhdl-compose-configuration-use-subconfigurationSpecifies whether subconfigurations should be used inside configurations.
vhdl-compose-create-filesSpecifies whether new files should be created for the new component.
vhdl-compose-include-headerNon-nil means include a header in automatically generated files.
vhdl-conditions-in-parenthesisNon-nil means place parenthesis around condition expressions.
vhdl-config-alistCache with configurations for each project/directory.
vhdl-configuration-file-nameSpecifies how the configuration file name is obtained.
vhdl-constantsList of VHDL standardized constants.
vhdl-constants-regexpRegexp for VHDL standardized constants.
vhdl-copyright-stringCopyright string to insert in file header.
vhdl-date-formatSpecifies the date format to use in the header.
vhdl-default-libraryName of default library.
vhdl-directive-keywordsList of compiler directive keywords recognized for highlighting.
vhdl-directivesList of VHDL standardized packages and libraries.
vhdl-directory-alistCache with source directories for each project.
vhdl-doc-coding-styleFor VHDL coding style and naming convention guidelines, see the following
vhdl-doc-keywordsReserved words in VHDL
vhdl-doc-release-notesRelease Notes for VHDL Mode 3.37
vhdl-echo-syntactic-information-pIf non-nil, syntactic info is echoed when the line is indented.
vhdl-electric-keywordsType of keywords for which electrification is enabled.
vhdl-electric-modeNon-nil if Vhdl-Electric mode is enabled.
vhdl-electric-mode-hookHook run after entering or leaving ‘vhdl-electric-mode’.
vhdl-emacs-22Non-nil if GNU Emacs >= 22, ... is used.
vhdl-end-comment-columnEnd of comment column.
vhdl-ent-inst-alistCache with instantiated entities for each project/directory.
vhdl-entity-alistCache with entities and corresponding architectures for each project/directory.
vhdl-entity-file-nameSpecifies how the entity file name is obtained.
vhdl-enum-valuesList of VHDL standardized enumeration values.
vhdl-enum-values-regexpRegexp for VHDL standardized enumeration values.
vhdl-error-regexp-emacs-alistList of regexps for VHDL compilers. For Emacs 22+.
vhdl-file-alistCache with design units in each file for each project/directory.
vhdl-file-footerString or file to insert as file footer.
vhdl-file-headerString or file to insert as file header.
vhdl-file-name-caseSpecifies how to change case for obtaining file names.
vhdl-font-lock-attribute-faceFace name to use for standardized attributes.
vhdl-font-lock-directive-faceFace name to use for directives.
vhdl-font-lock-enumvalue-faceFace name to use for standardized enumeration values.
vhdl-font-lock-function-faceFace name to use for standardized functions and packages.
vhdl-font-lock-generic-/constant-faceFace name to use for generic/constant.
vhdl-font-lock-keywordsRegular expressions to highlight in VHDL Mode.
vhdl-font-lock-keywords-0For consideration as a value of ‘vhdl-font-lock-keywords’.
vhdl-font-lock-keywords-1For consideration as a value of ‘vhdl-font-lock-keywords’.
vhdl-font-lock-keywords-2For consideration as a value of ‘vhdl-font-lock-keywords’.
vhdl-font-lock-keywords-3For consideration as a value of ‘vhdl-font-lock-keywords’.
vhdl-font-lock-keywords-4For consideration as a value of ‘vhdl-font-lock-keywords’.
vhdl-font-lock-keywords-5For consideration as a value of ‘vhdl-font-lock-keywords’.
vhdl-font-lock-prompt-faceFace name to use for prompts.
vhdl-font-lock-reserved-words-faceFace name to use for additional reserved words.
vhdl-font-lock-syntactic-keywordsMark single quotes as having string quote syntax in ‘c’ instances.
vhdl-font-lock-translate-off-faceFace name to use for translate-off regions.
vhdl-font-lock-type-faceFace name to use for type.
vhdl-font-lock-variable-faceFace name to use for variable.
vhdl-forbidden-syntaxSyntax of forbidden words to be highlighted.
vhdl-forbidden-wordsList of forbidden words to be highlighted.
vhdl-functionsList of VHDL standardized functions.
vhdl-functions-regexpRegexp for VHDL standardized functions.
vhdl-hide-all-initNon-nil means hide all design units initially after a file is loaded.
vhdl-hideshow-menuNon-nil means add hideshow menu and functionality at startup.
vhdl-highlight-case-sensitiveNon-nil means consider case for highlighting.
vhdl-highlight-forbidden-wordsNon-nil means highlight forbidden words.
vhdl-highlight-keywordsNon-nil means highlight VHDL keywords and other standardized words.
vhdl-highlight-namesNon-nil means highlight declaration names and construct labels.
vhdl-highlight-special-wordsNon-nil means highlight words with special syntax.
vhdl-highlight-translate-offNon-nil means background-highlight code excluded from translation.
vhdl-highlight-verilog-keywordsNon-nil means highlight Verilog keywords as reserved words.
vhdl-hs-start-regexpRegexp to match start of construct to hide.
vhdl-imenu-generic-expressionImenu generic expression for VHDL Mode. See ‘imenu-generic-expression’.
vhdl-include-direction-commentsNon-nil means include port direction in instantiations as comments.
vhdl-include-group-commentsSpecifies whether to include group comments and spacings.
vhdl-include-port-commentsNon-nil means include port comments when a port is pasted.
vhdl-include-type-commentsNon-nil means include generic/port type in instantiations as comments.
vhdl-indent-comment-like-next-code-lineNon-nil means comment lines are indented like the following code line.
vhdl-indent-syntax-basedNon-nil means indent lines of code based on their syntactic context.
vhdl-indent-tabs-modeNon-nil means indentation can insert tabs.
vhdl-index-menuNon-nil means add an index menu for a source file when loading.
vhdl-inhibit-startup-warnings-pIf non-nil, inhibits start up compatibility warnings.
vhdl-inline-comment-columnColumn to indent and align inline comments to.
vhdl-insert-empty-linesSpecifies whether to insert empty lines in some templates.
vhdl-instance-nameSpecifies how an instance name is obtained.
vhdl-intelligent-tabNon-nil means ‘TAB’ does indentation, word completion and tab insertion.
vhdl-keywordsList of VHDL keywords.
vhdl-keywords-regexpRegexp for VHDL keywords.
vhdl-label-keyRegexp describing a VHDL label.
vhdl-last-input-eventLast input event.
vhdl-make-targetDefault target for ‘vhdl-make’ command.
vhdl-makefile-default-targetsList of default target names in Makefiles.
vhdl-makefile-generation-hookFunctions to run at the end of Makefile generation.
vhdl-math-constantsList of Math Packages standardized constants.
vhdl-math-functionsList of Math Packages standardized functions.
vhdl-math-packagesList of Math Packages standardized packages and libraries.
vhdl-math-typesList of Math Packages standardized types.
vhdl-menu-max-sizeSpecifies the maximum size of a menu before splitting it into submenus.
vhdl-minibuffer-local-mapKeymap for minibuffer used in VHDL Mode.
vhdl-mode-abbrev-tableAbbrev table to use in ‘vhdl-mode’ buffers.
vhdl-mode-ext-syntax-tableSyntax table extended by ‘_’ used in ‘vhdl-mode’ buffers.
vhdl-mode-help-addressAddress for VHDL Mode bug reports.
vhdl-mode-hookHook called by ‘vhdl-mode’.
vhdl-mode-mapKeymap for VHDL Mode.
vhdl-mode-menu-listVHDL Mode menu.
vhdl-mode-syntax-tableSyntax table used in ‘vhdl-mode’ buffers.
vhdl-model-alistList of user models.
vhdl-model-mapKeymap for VHDL models.
vhdl-modified-file-listList of modified files to be rescanned for hierarchy updating.
vhdl-modify-date-on-savingNon-nil means update the modification date when the buffer is saved.
vhdl-modify-date-prefix-stringPrefix string of modification date in VHDL file header.
vhdl-offsets-alistAssociation list of syntactic element symbols and indentation offsets.
vhdl-offsets-alist-defaultDefault settings for offsets of syntactic elements.
vhdl-one-stringString to use for a logic one.
vhdl-optional-labelsConstructs for which labels are to be queried.
vhdl-package-alistCache with packages for each project/directory.
vhdl-package-file-nameSpecifies how the package file name is obtained.
vhdl-packagesList of VHDL standardized packages and libraries.
vhdl-packages-regexpRegexp for VHDL standardized packages and libraries.
vhdl-platform-specSpecification of VHDL platform to insert in file header.
vhdl-port-flattenedIndicates whether a port has been flattened.
vhdl-port-listVariable to hold last port map parsed.
vhdl-port-reversed-directionIndicates whether port directions are reversed.
vhdl-print-customize-facesNon-nil means use an optimized set of faces for PostScript printing.
vhdl-print-two-columnNon-nil means print code in two columns and landscape format.
vhdl-progress-intervalInterval used to update progress status during long operations.
vhdl-projectSpecifies the default for the current project.
vhdl-project-alistList of projects and their properties.
vhdl-project-auto-loadAutomatically load project setups from files.
vhdl-project-autoloadAutomatically load project setups from files.
vhdl-project-file-nameList of file names/paths for importing/exporting project setups.
vhdl-project-sortNon-nil means projects are displayed in alphabetical order.
vhdl-prompt-for-commentsNon-nil means various templates prompt for user definable comments.
vhdl-reserved-wordsList of additional reserved words.
vhdl-reserved-words-regexpRegexp for additional reserved words.
vhdl-reset-active-highNon-nil means reset in sequential processes is active high.
vhdl-reset-kindSpecifies which kind of reset to use in sequential processes.
vhdl-reset-nameName of reset signal to use in templates.
vhdl-self-insert-commentsNon-nil means various templates automatically insert help comments.
vhdl-sensitivity-list-allNon-nil means use ‘all’ keyword in sensitivity list.
vhdl-source-file-menuNon-nil means add a menu of all source files in current directory.
vhdl-special-indent-hookHook for user defined special indentation adjustments.
vhdl-special-syntax-alistList of special syntax to be highlighted.
vhdl-speedbar-auto-openNon-nil means automatically open speedbar at startup.
vhdl-speedbar-cache-file-nameName of file for saving hierarchy cache.
vhdl-speedbar-display-modeSpecifies the default displaying mode when opening speedbar.
vhdl-speedbar-hierarchy-depthDepth of instantiation hierarchy to display.
vhdl-speedbar-jump-to-unitNon-nil means jump to the design unit code when opened in a buffer.
vhdl-speedbar-last-selected-projectName of last selected project.
vhdl-speedbar-menu-itemsAdditional menu-items to add to speedbar frame.
vhdl-speedbar-mode-mapKeymap used when in the VHDL hierarchy browser mode.
vhdl-speedbar-save-cacheAutomatically save modified hierarchy caches when exiting Emacs.
vhdl-speedbar-scan-limitLimits scanning of large files and netlists.
vhdl-speedbar-show-projectsNon-nil means project hierarchy is displayed in speedbar, directory
vhdl-speedbar-shown-project-listList of projects simultaneously open in the current speedbar.
vhdl-speedbar-shown-unit-alistAlist of design units simultaneously open in the current speedbar for each
vhdl-speedbar-update-current-unitNon-nil means to run ‘vhdl-speedbar-update-current-unit’.
vhdl-speedbar-update-on-savingAutomatically update design hierarchy when buffer is saved.
vhdl-standardVHDL standards used.
vhdl-statement-bwd-reRegexp for searching backward that matches all known "statement" keywords.
vhdl-statement-fwd-reRegexp for searching forward that matches all known "statement" keywords.
vhdl-strict-syntax-pIf non-nil, all syntactic symbols must be found in ‘vhdl-offsets-alist’.
vhdl-stutter-modeNon-nil if Vhdl-Stutter mode is enabled.
vhdl-stutter-mode-hookHook run after entering or leaving ‘vhdl-stutter-mode’.
vhdl-style-alistStyles of Indentation.
vhdl-subprog-flattenedIndicates whether an subprogram interface has been flattened.
vhdl-subprog-listVariable to hold last subprogram interface parsed.
vhdl-symbol-keyRegexp describing a VHDL symbol.
vhdl-syntactic-contextBuffer local variable containing syntactic analysis list.
vhdl-template-construct-alistList of built-in construct templates.
vhdl-template-directive-alistList of built-in directive templates.
vhdl-template-invoked-by-hookIndicates whether a template has been invoked by a hook or by key or menu.
vhdl-template-mapKeymap for VHDL templates.
vhdl-template-package-alistList of built-in package templates.
vhdl-template-prompt-syntaxSyntax of prompt inserted by template generators.
vhdl-testbench-architecture-file-nameSpecifies how the testbench architecture file name is obtained.
vhdl-testbench-architecture-nameSpecifies how the testbench architecture name is obtained.
vhdl-testbench-configuration-nameSpecifies how the testbench configuration name is obtained.
vhdl-testbench-create-filesSpecifies whether new files should be created for the testbench.
vhdl-testbench-declarationsString or file to be inserted in the testbench declarative part.
vhdl-testbench-dut-nameSpecifies how a DUT instance name is obtained.
vhdl-testbench-entity-file-nameSpecifies how the testbench entity file name is obtained.
vhdl-testbench-entity-nameSpecifies how the testbench entity name is obtained.
vhdl-testbench-include-configurationNon-nil means a testbench configuration is attached at the end.
vhdl-testbench-include-headerNon-nil means include a header in automatically generated files.
vhdl-testbench-include-libraryNon-nil means a library/use clause for std_logic_1164 is included.
vhdl-testbench-initialize-signalsNon-nil means initialize signals with ‘0’ when declared in testbench.
vhdl-testbench-statementsString or file to be inserted in the testbench statement part.
vhdl-time-stampVHDL Mode time stamp for last update.
vhdl-typesList of VHDL standardized types.
vhdl-types-regexpRegexp for VHDL standardized types.
vhdl-underscore-is-part-of-wordNon-nil means consider the underscore character ‘_’ as part of word.
vhdl-updated-project-listList of projects and directories with updated files.
vhdl-upper-case-attributesNon-nil means convert standardized attributes to upper case.
vhdl-upper-case-constantsNon-nil means convert standardized constants to upper case.
vhdl-upper-case-enum-valuesNon-nil means convert standardized enumeration values to upper case.
vhdl-upper-case-keywordsNon-nil means convert keywords to upper case.
vhdl-upper-case-typesNon-nil means convert standardized types to upper case.
vhdl-use-components-packageNon-nil means use a separate components package for component declarations.
vhdl-use-direct-instantiationNon-nil means use VHDL’93 direct component instantiation.
vhdl-verilog-keywordsList of Verilog keywords as candidate for additional reserved words.
vhdl-versionVHDL Mode version number.
vhdl-warningsWarnings to tell the user during start up.
vhdl-word-completion-case-sensitiveNon-nil means word completion using ‘TAB’ is case sensitive.
vhdl-word-completion-in-minibufferNon-nil enables word completion in minibuffer (for template prompts).
vhdl-zero-stringString to use for a logic zero.

Defined functions (476)

he-list-beg()
vhdl--re2-region(BEG-RE END-RE)
vhdl--visit-file(FILE-NAME ISSUE-ERROR BODY-FUN)
vhdl-activate-customizations()
vhdl-add-modified-file()
vhdl-add-source-files-menu()
vhdl-add-syntax(SYMBOL &optional RELPOS)
vhdl-adelete(ALIST-SYMBOL KEY)
vhdl-aget(ALIST KEY)
vhdl-align-buffer()
vhdl-align-declarations(&optional SPACING)
vhdl-align-group(&optional SPACING)
vhdl-align-inline-comment-buffer()
vhdl-align-inline-comment-group(&optional SPACING)
vhdl-align-inline-comment-region(BEG END &optional SPACING NO-MESSAGE)
vhdl-align-inline-comment-region-1(BEG END &optional SPACING)
vhdl-align-list(&optional SPACING)
vhdl-align-region(BEG END &optional SPACING)
vhdl-align-region-1(BEGIN END &optional SPACING ALIGNMENT-LIST INDENT)
vhdl-align-region-2(BEGIN END MATCH &optional SUBSTR SPACING)
vhdl-align-region-groups(BEG END &optional SPACING NO-MESSAGE NO-COMMENTS)
vhdl-align-same-indent(&optional SPACING)
vhdl-aput(ALIST-SYMBOL KEY &optional VALUE)
vhdl-aput-delete-if-nil(ALIST-SYMBOL KEY &optional VALUE)
vhdl-auto-load-project()
vhdl-autoload-project()
vhdl-back-to-indentation()
vhdl-backward-same-indent()
vhdl-backward-sexp(&optional COUNT LIM)
vhdl-backward-skip-label(&optional LIM)
vhdl-backward-syntactic-ws(&optional LIM)
vhdl-backward-to-block(&optional LIM)
vhdl-backward-up-list(&optional COUNT LIMIT)
vhdl-beautify-buffer()
vhdl-beautify-region(BEG END)
vhdl-begin-p(&optional LIM)
vhdl-beginning-of-block()
vhdl-beginning-of-defun(&optional COUNT)
vhdl-beginning-of-directive(&optional LIM)
vhdl-beginning-of-libunit()
vhdl-beginning-of-macro(&optional LIM)
vhdl-beginning-of-statement(&optional COUNT LIM INTERACTIVE)
vhdl-beginning-of-statement-1(&optional LIM)
vhdl-case-alternative-p(&optional LIM)
vhdl-case-keyword(KEYWORD)
vhdl-case-word(NUM)
vhdl-character-to-event(ARGUMENT)
vhdl-comment-append-inline()
vhdl-comment-block()
vhdl-comment-display(&optional LINE-EXISTS)
vhdl-comment-display-line()
vhdl-comment-indent()
vhdl-comment-insert()
vhdl-comment-insert-inline(&optional STRING ALWAYS-INSERT)
vhdl-comment-kill-inline-region(BEG END)
vhdl-comment-kill-region(BEG END)
vhdl-comment-uncomment-line(&optional ARG)
vhdl-comment-uncomment-region(BEG END &optional ARG)
vhdl-compile()
vhdl-compile-directory()
vhdl-compile-init()
vhdl-compile-print-file-name()
vhdl-compose-components-package()
vhdl-compose-configuration(&optional ENT-NAME ARCH-NAME)
vhdl-compose-configuration-architecture(ENT-NAME ARCH-NAME ENT-ALIST-ARG CONF-ALIST-ARG INST-ALIST &optional INSERT-CONF)
vhdl-compose-insert-generic(ENTRY)
vhdl-compose-insert-port(ENTRY)
vhdl-compose-insert-signal(ENTRY)
vhdl-compose-new-component()
vhdl-compose-place-component()
vhdl-compose-wire-components()
vhdl-corresponding-begin(&optional LIM)
vhdl-corresponding-defun()
vhdl-corresponding-end(&optional LIM)
vhdl-corresponding-mid(&optional LIM)
vhdl-create-mode-menu()
vhdl-current-line()
vhdl-custom-set(VARIABLE VALUE &rest FUNCTIONS)
vhdl-customize()
vhdl-decision-query(STRING PROMPT &optional OPTIONAL)
vhdl-default-directory()
vhdl-delete(ELT LIST)
vhdl-delete-indentation()
vhdl-directory-files(DIRECTORY &optional FULL MATCH)
vhdl-do-group(FUNCTION &optional SPACING)
vhdl-do-list(FUNCTION &optional SPACING)
vhdl-do-same-indent(FUNCTION &optional SPACING)
vhdl-doc-mode()
vhdl-doc-variable(VARIABLE)
vhdl-duplicate-project()
vhdl-electric-close-bracket(COUNT)
vhdl-electric-comma(COUNT)
vhdl-electric-dash(COUNT)
vhdl-electric-equal(COUNT)
vhdl-electric-mode(&optional ARG)
vhdl-electric-open-bracket(COUNT)
vhdl-electric-period(COUNT)
vhdl-electric-quote(COUNT)
vhdl-electric-return()
vhdl-electric-semicolon(COUNT)
vhdl-electric-space(COUNT)
vhdl-electric-tab(&optional ARG)
vhdl-end-of-block()
vhdl-end-of-defun(&optional COUNT)
vhdl-end-of-statement()
vhdl-end-p(&optional LIM)
vhdl-end-translate-off(LIMIT)
vhdl-error-regexp-add-emacs()
vhdl-expand-abbrev(ARG1)
vhdl-expand-paren(ARG1)
vhdl-export-project(FILE-NAME)
vhdl-fill-group()
vhdl-fill-list()
vhdl-fill-region(BEG END &optional ARG)
vhdl-fill-same-indent()
vhdl-first-word(POINT)
vhdl-fix-case-buffer()
vhdl-fix-case-region(BEG END &optional ARG)
vhdl-fix-case-region-1(BEG END UPPER-CASE WORD-REGEXP &optional COUNT)
vhdl-fix-case-word(&optional ARG)
vhdl-fix-clause()
vhdl-fix-clause-buffer()
vhdl-fix-statement-buffer()
vhdl-fix-statement-region(BEG END &optional ARG)
vhdl-fixup-whitespace-buffer()
vhdl-fixup-whitespace-region(BEG END &optional NO-MESSAGE)
vhdl-font-lock-init()
vhdl-font-lock-match-item(LIMIT)
vhdl-fontify-buffer()
vhdl-forward-comment(COUNT)
vhdl-forward-same-indent()
vhdl-forward-sexp(&optional COUNT LIM)
vhdl-forward-skip-label(&optional LIM)
vhdl-forward-syntactic-ws(&optional LIM)
vhdl-function-name(PREFIX STRING &optional POSTFIX)
vhdl-generate-makefile()
vhdl-generate-makefile-1()
vhdl-get-block-state(&optional LIM)
vhdl-get-compile-options(PROJECT COMPILER FILE-NAME &optional FILE-OPTIONS-ONLY)
vhdl-get-components-package-name()
vhdl-get-end-of-unit()
vhdl-get-hierarchy(ENT-ALIST-ARG CONF-ALIST-ARG ENT-KEY ARCH-KEY CONF-KEY-ARG CONF-INST-ALIST LEVEL INDENT &optional INCLUDE-TOP ENT-HIER)
vhdl-get-instantiations(ENT-KEY INDENT)
vhdl-get-library-unit(BOD PLACEHOLDER)
vhdl-get-make-options(PROJECT COMPILER)
vhdl-get-offset(LANGELEM)
vhdl-get-packages(LIB-ALIST WORK-LIBRARY)
vhdl-get-source-files(&optional FULL DIRECTORY)
vhdl-get-subdirs(DIRECTORY)
vhdl-get-syntactic-context()
vhdl-get-visible-signals()
vhdl-goto-marker(MARKER)
vhdl-has-syntax(SYMBOL)
vhdl-he-list-beg()
vhdl-hideshow-init()
vhdl-hooked-abbrev(FUNC)
vhdl-hs-forward-sexp-func(COUNT)
vhdl-hs-minor-mode(&optional ARG)
vhdl-import-project(FILE-NAME &optional AUTO NOT-MAKE-CURRENT)
vhdl-in-argument-list-p()
vhdl-in-comment-p(&optional POS)
vhdl-in-extended-identifier-p()
vhdl-in-literal()
vhdl-in-quote-p()
vhdl-in-string-p()
vhdl-indent-buffer()
vhdl-indent-group()
vhdl-indent-line()
vhdl-indent-region(START END &optional COLUMN)
vhdl-indent-sexp(&optional ENDPOS)
vhdl-index-menu-init()
vhdl-insert-file-contents(FILENAME)
vhdl-insert-keyword(KEYWORD)
vhdl-insert-string-or-file(STRING)
vhdl-keep-region-active()
vhdl-last-word(POINT)
vhdl-line-copy(&optional ARG)
vhdl-line-expand(&optional ARG)
vhdl-line-kill(&optional ARG)
vhdl-line-kill-entire(&optional ARG)
vhdl-line-open()
vhdl-line-transpose-next(&optional ARG)
vhdl-line-transpose-previous(&optional ARG)
vhdl-line-yank()
vhdl-lineup-arglist(LANGELEM)
vhdl-lineup-arglist-intro(LANGELEM)
vhdl-lineup-comment(LANGELEM)
vhdl-lineup-statement-cont(LANGELEM)
vhdl-load-cache(KEY)
vhdl-make(&optional TARGET)
vhdl-makefile-name()
vhdl-mark-defun()
vhdl-match-string-downcase(NUM &optional STRING)
vhdl-match-translate-off(LIMIT)
vhdl-max-marker(MARKER1 MARKER2)
vhdl-menu-split(LIST TITLE)
vhdl-minibuffer-tab(&optional ARG)
vhdl-mode()
vhdl-mode-abbrev-table-init()
vhdl-mode-map-init()
vhdl-model-defun()
vhdl-model-example-model()
vhdl-model-insert(MODEL-NAME)
vhdl-model-map-init()
vhdl-parse-group-comment()
vhdl-parse-string(STRING &optional OPTIONAL)
vhdl-paste-group-comment(STRING INDENT)
vhdl-point(POSITION)
vhdl-port-copy()
vhdl-port-flatten(&optional AS-ALIST)
vhdl-port-paste-component(&optional NO-INDENT)
vhdl-port-paste-constants(&optional NO-INDENT)
vhdl-port-paste-context-clause(&optional EXCLUDE-PACK-NAME)
vhdl-port-paste-declaration(KIND &optional NO-INDENT)
vhdl-port-paste-entity(&optional NO-INDENT)
vhdl-port-paste-generic(&optional NO-INIT)
vhdl-port-paste-generic-map(&optional SECONDARY NO-CONSTANTS)
vhdl-port-paste-initializations(&optional NO-INDENT)
vhdl-port-paste-instance(&optional NAME NO-INDENT TITLE)
vhdl-port-paste-port()
vhdl-port-paste-port-map()
vhdl-port-paste-signals(&optional INITIALIZE NO-INDENT)
vhdl-port-paste-testbench()
vhdl-port-reverse-direction()
vhdl-prepare-search-1(&rest BODY)
vhdl-prepare-search-2(&rest BODY)
vhdl-print-warnings()
vhdl-process-command-line-option(OPTION)
vhdl-project-p(&optional WARNING)
vhdl-ps-print-init()
vhdl-ps-print-settings()
vhdl-re-search-backward(REGEXP &optional BOUND NOERROR COUNT)
vhdl-re-search-forward(REGEXP &optional BOUND NOERROR COUNT)
vhdl-read-offset(LANGELEM)
vhdl-regress-line(&optional ARG)
vhdl-remove-trailing-spaces()
vhdl-remove-trailing-spaces-region(BEG END &optional ARG)
vhdl-replace-string(REGEXP-CONS STRING &optional ADJUST-CASE)
vhdl-require-hierarchy-info()
vhdl-resolve-env-variable(STRING)
vhdl-resolve-paths(PATH-LIST)
vhdl-run-when-idle(SECS REPEAT FUNCTION)
vhdl-safe(&rest BODY)
vhdl-save-cache(KEY)
vhdl-save-caches()
vhdl-scan-context-clause()
vhdl-scan-directory-contents(NAME &optional PROJECT UPDATE NUM-STRING NON-FINAL)
vhdl-scan-project-contents(PROJECT)
vhdl-sequential-statement-p()
vhdl-set-compiler(NAME)
vhdl-set-default-project()
vhdl-set-offset(SYMBOL OFFSET &optional ADD-P)
vhdl-set-project(NAME)
vhdl-set-style(STYLE &optional LOCAL)
vhdl-show-messages()
vhdl-show-syntactic-information()
vhdl-skip-case-alternative(&optional LIM)
vhdl-sort-alist(ALIST)
vhdl-speedbar(&optional ARG)
vhdl-speedbar-check-unit(DESIGN-UNIT)
vhdl-speedbar-configuration()
vhdl-speedbar-contract-all()
vhdl-speedbar-contract-level()
vhdl-speedbar-dired(TEXT TOKEN INDENT)
vhdl-speedbar-display-directory(DIRECTORY DEPTH &optional RESCAN)
vhdl-speedbar-display-projects(PROJECT DEPTH &optional RESCAN)
vhdl-speedbar-expand-all()
vhdl-speedbar-expand-architecture(TEXT TOKEN INDENT)
vhdl-speedbar-expand-config(TEXT TOKEN INDENT)
vhdl-speedbar-expand-dirs(DIRECTORY)
vhdl-speedbar-expand-entity(TEXT TOKEN INDENT)
vhdl-speedbar-expand-package(TEXT TOKEN INDENT)
vhdl-speedbar-expand-project(TEXT TOKEN INDENT)
vhdl-speedbar-expand-units(KEY)
vhdl-speedbar-find-file(TEXT TOKEN INDENT)
vhdl-speedbar-generate-makefile()
vhdl-speedbar-goto-this-unit(DIRECTORY UNIT)
vhdl-speedbar-higher-text()
vhdl-speedbar-initialize()
vhdl-speedbar-insert-dir-hierarchy(DIRECTORY DEPTH &optional RESCAN)
vhdl-speedbar-insert-dirs(FILES LEVEL)
vhdl-speedbar-insert-hierarchy(ENT-ALIST-ARG CONF-ALIST-ARG PKG-ALIST ENT-INST-LIST DEPTH)
vhdl-speedbar-insert-project-hierarchy(PROJECT INDENT &optional RESCAN)
vhdl-speedbar-insert-projects()
vhdl-speedbar-insert-subpackages(SUBPACK-ALIST INDENT DIR-INDENT)
vhdl-speedbar-item-info()
vhdl-speedbar-line-key(&optional INDENT)
vhdl-speedbar-line-project(&optional INDENT)
vhdl-speedbar-line-text()
vhdl-speedbar-make-design()
vhdl-speedbar-make-inst-line(INST-NAME INST-FILE-MARKER ENT-NAME ENT-FILE-MARKER ARCH-NAME ARCH-FILE-MARKER CONF-NAME CONF-FILE-MARKER LIB-NAME DEPTH OFFSET DELIMITER)
vhdl-speedbar-make-pack-line(PACK-KEY PACK-NAME PACK-FILE-MARKER BODY-FILE-MARKER DEPTH)
vhdl-speedbar-make-subpack-line(PACK-NAME LIB-NAME PACK-FILE-MARKER PACK-BODY-FILE-MARKER DEPTH)
vhdl-speedbar-make-subprogram-line(FUNC-NAME FUNC-FILE-MARKER FUNC-BODY-FILE-MARKER DEPTH)
vhdl-speedbar-make-title-line(TEXT &optional DEPTH)
vhdl-speedbar-place-component()
vhdl-speedbar-port-copy()
vhdl-speedbar-refresh(&optional KEY)
vhdl-speedbar-rescan-hierarchy()
vhdl-speedbar-select-mra()
vhdl-speedbar-set-depth(DEPTH)
vhdl-speedbar-update-current-project()
vhdl-speedbar-update-current-unit(&optional NO-POSITION ALWAYS)
vhdl-speedbar-update-units(TEXT UNIT-LIST FILE-NAME FACE &optional POS)
vhdl-standard-p(STANDARD)
vhdl-start-translate-off(LIMIT)
vhdl-statement-p(&optional LIM)
vhdl-statistics-buffer()
vhdl-stutter-mode(&optional ARG)
vhdl-submit-bug-report()
vhdl-subprog-copy()
vhdl-subprog-flatten()
vhdl-subprog-paste-body()
vhdl-subprog-paste-call()
vhdl-subprog-paste-declaration()
vhdl-subprog-paste-specification(KIND)
vhdl-template-alias()
vhdl-template-architecture()
vhdl-template-argument-list(&optional IS-FUNCTION)
vhdl-template-array(KIND &optional SECONDARY)
vhdl-template-assert()
vhdl-template-attribute()
vhdl-template-attribute-decl()
vhdl-template-attribute-spec()
vhdl-template-bare-loop()
vhdl-template-begin-end(CONSTRUCT NAME MARGIN &optional EMPTY-LINES)
vhdl-template-block()
vhdl-template-block-configuration()
vhdl-template-break()
vhdl-template-case(&optional KIND)
vhdl-template-case-is()
vhdl-template-case-use()
vhdl-template-clocked-wait()
vhdl-template-component()
vhdl-template-component-conf()
vhdl-template-component-decl()
vhdl-template-component-inst()
vhdl-template-conditional-signal-asst()
vhdl-template-configuration()
vhdl-template-configuration-decl()
vhdl-template-configuration-spec(&optional OPTIONAL-USE)
vhdl-template-constant()
vhdl-template-construct-alist-init()
vhdl-template-context()
vhdl-template-default()
vhdl-template-default-indent()
vhdl-template-directive(DIRECTIVE)
vhdl-template-directive-synthesis-off()
vhdl-template-directive-synthesis-on()
vhdl-template-directive-translate-off()
vhdl-template-directive-translate-on()
vhdl-template-disconnect()
vhdl-template-else()
vhdl-template-elsif()
vhdl-template-entity()
vhdl-template-exit()
vhdl-template-field(PROMPT &optional FOLLOW-STRING OPTIONAL BEGIN END IS-STRING DEFAULT)
vhdl-template-file()
vhdl-template-footer()
vhdl-template-for()
vhdl-template-for-generate()
vhdl-template-for-loop()
vhdl-template-function(&optional KIND)
vhdl-template-function-body()
vhdl-template-function-decl()
vhdl-template-generate()
vhdl-template-generate-body(MARGIN LABEL)
vhdl-template-generic()
vhdl-template-generic-list(OPTIONAL &optional NO-VALUE)
vhdl-template-group()
vhdl-template-group-decl()
vhdl-template-group-template()
vhdl-template-header(&optional FILE-TITLE)
vhdl-template-if()
vhdl-template-if-generate()
vhdl-template-if-then()
vhdl-template-if-then-use(KIND)
vhdl-template-if-use()
vhdl-template-insert-construct(NAME)
vhdl-template-insert-date()
vhdl-template-insert-directive(NAME)
vhdl-template-insert-fun(FUN)
vhdl-template-insert-package(NAME)
vhdl-template-instance()
vhdl-template-library()
vhdl-template-limit()
vhdl-template-loop()
vhdl-template-map(&optional START OPTIONAL SECONDARY)
vhdl-template-map-init()
vhdl-template-modify(&optional NOERROR)
vhdl-template-modify-noerror()
vhdl-template-nature()
vhdl-template-next()
vhdl-template-others()
vhdl-template-package(&optional KIND)
vhdl-template-package-alist-init()
vhdl-template-package-body()
vhdl-template-package-decl()
vhdl-template-package-electrical-systems()
vhdl-template-package-energy-systems()
vhdl-template-package-fluidic-systems()
vhdl-template-package-fundamental-constants()
vhdl-template-package-material-constants()
vhdl-template-package-math-complex()
vhdl-template-package-math-real()
vhdl-template-package-mechanical-systems()
vhdl-template-package-numeric-bit()
vhdl-template-package-numeric-std()
vhdl-template-package-radiant-systems()
vhdl-template-package-std-logic-1164()
vhdl-template-package-std-logic-arith()
vhdl-template-package-std-logic-misc()
vhdl-template-package-std-logic-signed()
vhdl-template-package-std-logic-textio()
vhdl-template-package-std-logic-unsigned()
vhdl-template-package-textio()
vhdl-template-package-thermal-systems()
vhdl-template-paired-parens()
vhdl-template-port()
vhdl-template-port-list(OPTIONAL)
vhdl-template-procedural()
vhdl-template-procedure(&optional KIND)
vhdl-template-procedure-body()
vhdl-template-procedure-decl()
vhdl-template-process(&optional KIND)
vhdl-template-process-comb()
vhdl-template-process-seq()
vhdl-template-quantity()
vhdl-template-quantity-branch()
vhdl-template-quantity-free()
vhdl-template-quantity-source()
vhdl-template-record(KIND &optional NAME SECONDARY)
vhdl-template-replace-header-keywords(BEG END &optional FILE-TITLE IS-MODEL)
vhdl-template-report()
vhdl-template-return()
vhdl-template-search-prompt()
vhdl-template-selected-signal-asst()
vhdl-template-seq-process(CLOCK RESET RESET-KIND)
vhdl-template-signal()
vhdl-template-standard-package(LIBRARY PACKAGE)
vhdl-template-subnature()
vhdl-template-subprogram-body()
vhdl-template-subprogram-decl()
vhdl-template-subtype()
vhdl-template-terminal()
vhdl-template-type()
vhdl-template-undo(BEGIN END)
vhdl-template-use()
vhdl-template-variable()
vhdl-template-wait()
vhdl-template-when()
vhdl-template-while-loop()
vhdl-template-with()
vhdl-toggle-project(NAME TOKEN INDENT)
vhdl-try-expand-abbrev(OLD)
vhdl-uniquify(IN-LIST)
vhdl-upcase-list(CONDITION LIST)
vhdl-update-file-contents(FILE-NAME)
vhdl-update-hierarchy()
vhdl-update-mode-menu()
vhdl-update-sensitivity-list()
vhdl-update-sensitivity-list-buffer()
vhdl-update-sensitivity-list-process()
vhdl-use-direct-instantiation()
vhdl-version()
vhdl-visit-file(FILE-NAME ISSUE-ERROR &rest BODY)
vhdl-warning(STRING &optional NOBEEP)
vhdl-warning-when-idle(&rest ARGS)
vhdl-widget-directory-validate(WIDGET)
vhdl-win-bsws(&optional LIM)
vhdl-win-fsws(&optional LIM)
vhdl-win-il(&optional LIM)
vhdl-within-translate-off()
vhdl-words-init()
vhdl-work-library()
vhdl-write-file-hooks-init()

Defined faces (22)

vhdl-font-lock-attribute-faceFont lock mode face used to highlight standardized attributes.
vhdl-font-lock-directive-faceFont lock mode face used to highlight directives.
vhdl-font-lock-enumvalue-faceFont lock mode face used to highlight standardized enumeration values.
vhdl-font-lock-function-faceFont lock mode face used to highlight standardized functions and packages.
vhdl-font-lock-generic-/constant-faceFont lock mode face used to highlight generic/constant.
vhdl-font-lock-prompt-faceFont lock mode face used to highlight prompts.
vhdl-font-lock-reserved-words-faceFont lock mode face used to highlight additional reserved words.
vhdl-font-lock-translate-off-faceFont lock mode face used to background highlight translate-off regions.
vhdl-font-lock-type-faceFont lock mode face used to highlight type.
vhdl-font-lock-variable-faceFont lock mode face used to highlight variable.
vhdl-speedbar-architecture-faceFace used for displaying architecture names.
vhdl-speedbar-architecture-selected-faceFace used for displaying architecture names.
vhdl-speedbar-configuration-faceFace used for displaying configuration names.
vhdl-speedbar-configuration-selected-faceFace used for displaying configuration names.
vhdl-speedbar-entity-faceFace used for displaying entity names.
vhdl-speedbar-entity-selected-faceFace used for displaying entity names.
vhdl-speedbar-instantiation-faceFace used for displaying instantiation names.
vhdl-speedbar-instantiation-selected-faceFace used for displaying instantiation names.
vhdl-speedbar-library-faceFace used for displaying library names.
vhdl-speedbar-package-faceFace used for displaying package names.
vhdl-speedbar-package-selected-faceFace used for displaying package names.
vhdl-speedbar-subprogram-faceFace used for displaying subprogram names.