Variable: vhdl-abbrev-list

(nil "abs" "access" "after" "alias" "all" "and" "architecture" "array"
     "assert" "attribute" "begin" "block" "body" "buffer" "bus" "case"
     "component" "configuration" "constant" "disconnect" "downto"
     "else" "elsif" "end" "entity" "exit" "file" "for" "function"
     "generate" "generic" "group" "guarded" "if" "impure" "in"
     "inertial" "inout" "is" "label" "library" "linkage" "literal"
     "loop" "map" "mod" "nand" "new" "next" "nor" "not" "null" "of"
     "on" "open" "or" "others" "out" "package" "port" "postponed"
     "procedure" "process" "protected" "pure" "range" "record"
     "register" "reject" "rem" "report" "return" "rol" "ror" "select"
     "severity" "shared" "signal" "sla" "sll" "sra" "srl" "subtype"
     "then" "to" "transport" "type" "unaffected" "units" "until" "use"
     "variable" "wait" "when" "while" "with" "xnor" "xor" nil
     "boolean" "bit" "bit_vector" "character" "severity_level"
     "integer" "real" "time" "natural" "positive" "string" "line"
     "text" "side" "unsigned" "signed" "delay_length" "file_open_kind"
     "file_open_status" "std_logic" "std_logic_vector" "std_ulogic"
     "std_ulogic_vector" nil "base" "left" "right" "high" "low" "pos"
     "val" "succ" "pred" "leftof" "rightof" "range" "reverse_range"
     "length" "delayed" "stable" "quiet" "transaction" "event"
     "active" "last_event" "last_active" "last_value" "driving"
     "driving_value" "ascending" "value" "image" "simple_name"
     "instance_name" "path_name" "foreign" nil "true" "false" "note"
     "warning" "error" "failure" "read_mode" "write_mode"
     "append_mode" "open_ok" "status_error" "name_error" "mode_error"
     "fs" "ps" "ns" "us" "ms" "sec" "min" "hr" "right" "left" t "" nil
     "now" "resolved" "rising_edge" "falling_edge" "read" "readline"
     "hread" "oread" "write" "writeline" "hwrite" "owrite" "endfile"
     "resize" "is_X" "std_match" "shift_left" "shift_right"
     "rotate_left" "rotate_right" "to_unsigned" "to_signed"
     "to_integer" "to_stdLogicVector" "to_stdULogic"
     "to_stdULogicVector" "to_bit" "to_bitVector" "to_X01" "to_X01Z"
     "to_UX01" "to_01" "conv_unsigned" "conv_signed" "conv_integer"
     "conv_std_logic_vector" "shl" "shr" "ext" "sxt" "deallocate" nil
     "std_logic_1164" "numeric_std" "numeric_bit" "standard" "textio"
     "std_logic_arith" "std_logic_signed" "std_logic_unsigned"
     "std_logic_misc" "std_logic_textio" "ieee" "std" "work" nil)